Modules

Functions

module vmm_hw_in_if (rx_rdy, tx_rdy, msg, uclk, urst)
module vmm_hw_out_if (tx_rdy, rx_rdy, msg, uclk, urst)
module vmm_hw_clock_control (uclk, urst, rdy_for_cclk, cclk_en, rdy_for_cclk_neg, cclk_neg_en)
module vmm_hw ()
module vmm_hw_clock (cclk, crst, crstn)
module vmm_alias (w, w)

Function Documentation

module vmm_alias ( ,
 
)

Definition at line 23 of file vmm_alias.sv.

module vmm_hw (  ) 

Definition at line 302 of file vmm_hw_rtl.sv.

module vmm_hw_clock ( cclk  ,
crst  ,
crstn   
)

Definition at line 389 of file vmm_hw_rtl.sv.

module vmm_hw_clock_control ( uclk  ,
urst  ,
rdy_for_cclk  ,
cclk_en  ,
rdy_for_cclk_neg  ,
cclk_neg_en   
)

Definition at line 247 of file vmm_hw_rtl.sv.

module vmm_hw_in_if ( rx_rdy  ,
tx_rdy  ,
msg  ,
uclk  ,
urst   
)

Definition at line 109 of file vmm_hw_rtl.sv.

module vmm_hw_out_if ( tx_rdy  ,
rx_rdy  ,
msg  ,
uclk  ,
urst   
)

Definition at line 184 of file vmm_hw_rtl.sv.


Intelligent Design Verification
Intelligent Design Verification
Project: VMM, Revision: 1.1.1
Copyright (c) 2008-2010 Intelligent Design Verification.
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http://www.intelligentdv.com/licenses/fdl.txt
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