

Public Member Functions | |
| new () | |
Public Attributes | |
| rand int unsigned | n_beats |
| rand bit< 64-1:0 > | incr_addr |
| rand bit< 64-1:0 > | max_addr |
| rand logic< 64-1:0 > | data [] |
| vmm_data | user_data |
| constraint | vmm_rw_burst_valid |
| constraint | reasonable |
| constraint | linear |
| constraint | fifo |
| constraint | wrap |
Definition at line 81 of file vmm_rw.sv.
| vmm_rw_burst::new | ( | ) |
| rand int unsigned vmm_rw_burst::n_beats |
| rand bit< 64 -1:0> vmm_rw_burst::incr_addr |
| rand bit< 64 -1:0> vmm_rw_burst::max_addr |
| rand logic< 64 -1:0> vmm_rw_burst::data[] |
| constraint vmm_rw_burst::vmm_rw_burst_valid |
| constraint vmm_rw_burst::reasonable |
| constraint vmm_rw_burst::linear |
| constraint vmm_rw_burst::fifo |
| constraint vmm_rw_burst::wrap |
![]() Intelligent Design Verification Project: VMM, Revision: 1.0.1 |
Copyright (c) 2008 Intelligent Design Verification. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included here: http://www.intelligentdv.com/licenses/fdl.txt |
![]() Doxygen Version: 1.5.6 Sat Oct 18 11:32:38 2008 |