
Public Member Functions | |
| new (bit< 63:0 > start_offset, bit< 63:0 > end_offset, int unsigned len, int unsigned n_bytes, vmm_mam parent) | |
| bit< 63:0 > | get_start_offset () |
| bit< 63:0 > | get_end_offset () |
| int unsigned | get_len () |
| int unsigned | get_n_bytes () |
| string | psdisplay (string prefix=" ") |
| void | release_region () |
| vmm_ral_mem | get_memory () |
| vmm_ral_vreg | get_virtual_registers () |
| void | write (output vmm_rw::status_e status, input bit< VMM_RAL_ADDR_WIDTH-1:0 > offset, input bit< VMM_RAL_DATA_WIDTH-1:0 > value, input vmm_ral::path_e path=vmm_ral::DEFAULT, input string domain=" ", input int data_id=-1, input int scenario_id=-1, input int stream_id=-1) |
| void | read (output vmm_rw::status_e status, input bit< VMM_RAL_ADDR_WIDTH-1:0 > offset, output bit< VMM_RAL_DATA_WIDTH-1:0 > value, input vmm_ral::path_e path=vmm_ral::DEFAULT, input string domain=" ", input int data_id=-1, input int scenario_id=-1, input int stream_id=-1) |
| void | burst_write (output vmm_rw::status_e status, input vmm_ral_mem_burst burst, input bit< VMM_RAL_DATA_WIDTH-1:0 > value[], input vmm_ral::path_e path=vmm_ral::DEFAULT, input string domain=" ", input int data_id=-1, input int scenario_id=-1, input int stream_id=-1) |
| void | burst_read (output vmm_rw::status_e status, input vmm_ral_mem_burst burst, output bit< VMM_RAL_DATA_WIDTH-1:0 > value[], input vmm_ral::path_e path=vmm_ral::DEFAULT, input string domain=" ", input int data_id=-1, input int scenario_id=-1, input int stream_id=-1) |
| void | poke (output vmm_rw::status_e status, input bit< VMM_RAL_ADDR_WIDTH-1:0 > offset, input bit< VMM_RAL_DATA_WIDTH-1:0 > value, input int data_id=-1, input int scenario_id=-1, input int stream_id=-1) |
| void | peek (output vmm_rw::status_e status, input bit< VMM_RAL_ADDR_WIDTH-1:0 > offset, output bit< VMM_RAL_DATA_WIDTH-1:0 > value, input int data_id=-1, input int scenario_id=-1, input int stream_id=-1) |
Public Attributes | |
| bit[63:0] | Xstart_offsetX |
| bit[63:0] | Xend_offsetX |
| vmm_ral_vreg | XvregX |
Private Attributes | |
| int unsigned | len |
| int unsigned | n_bytes |
| vmm_mam | parent |
Definition at line 34 of file vmm_mam.sv.
| vmm_mam_region::new | ( | bit< 63:0 > | start_offset, | |
| bit< 63:0 > | end_offset, | |||
| int unsigned | len, | |||
| int unsigned | n_bytes, | |||
| vmm_mam | parent | |||
| ) |
Definition at line 198 of file vmm_mam.sv.
| bit< 63:0 > vmm_mam_region::get_start_offset | ( | ) |
Definition at line 212 of file vmm_mam.sv.
| bit< 63:0 > vmm_mam_region::get_end_offset | ( | ) |
Definition at line 217 of file vmm_mam.sv.
| int unsigned vmm_mam_region::get_len | ( | ) |
Definition at line 222 of file vmm_mam.sv.
| int unsigned vmm_mam_region::get_n_bytes | ( | ) |
Definition at line 227 of file vmm_mam.sv.
| string vmm_mam_region::psdisplay | ( | string | prefix = " " |
) |
Definition at line 232 of file vmm_mam.sv.
| void vmm_mam_region::release_region | ( | ) |
Definition at line 238 of file vmm_mam.sv.
| vmm_ral_mem vmm_mam_region::get_memory | ( | ) |
Definition at line 243 of file vmm_mam.sv.
| vmm_ral_vreg vmm_mam_region::get_virtual_registers | ( | ) |
Definition at line 248 of file vmm_mam.sv.
| void vmm_mam_region::write | ( | output vmm_rw::status_e | status, | |
| input bit< VMM_RAL_ADDR_WIDTH-1:0 > | offset, | |||
| input bit< VMM_RAL_DATA_WIDTH-1:0 > | value, | |||
| input vmm_ral::path_e | path = vmm_ral::DEFAULT, |
|||
| input string | domain = " ", |
|||
| input int | data_id = -1, |
|||
| input int | scenario_id = -1, |
|||
| input int | stream_id = -1 | |||
| ) |
Definition at line 415 of file vmm_mam.sv.
| void vmm_mam_region::read | ( | output vmm_rw::status_e | status, | |
| input bit< VMM_RAL_ADDR_WIDTH-1:0 > | offset, | |||
| output bit< VMM_RAL_DATA_WIDTH-1:0 > | value, | |||
| input vmm_ral::path_e | path = vmm_ral::DEFAULT, |
|||
| input string | domain = " ", |
|||
| input int | data_id = -1, |
|||
| input int | scenario_id = -1, |
|||
| input int | stream_id = -1 | |||
| ) |
Definition at line 446 of file vmm_mam.sv.
| void vmm_mam_region::burst_write | ( | output vmm_rw::status_e | status, | |
| input vmm_ral_mem_burst | burst, | |||
| input bit< VMM_RAL_DATA_WIDTH-1:0 > | value[], | |||
| input vmm_ral::path_e | path = vmm_ral::DEFAULT, |
|||
| input string | domain = " ", |
|||
| input int | data_id = -1, |
|||
| input int | scenario_id = -1, |
|||
| input int | stream_id = -1 | |||
| ) |
Definition at line 476 of file vmm_mam.sv.
| void vmm_mam_region::burst_read | ( | output vmm_rw::status_e | status, | |
| input vmm_ral_mem_burst | burst, | |||
| output bit< VMM_RAL_DATA_WIDTH-1:0 > | value[], | |||
| input vmm_ral::path_e | path = vmm_ral::DEFAULT, |
|||
| input string | domain = " ", |
|||
| input int | data_id = -1, |
|||
| input int | scenario_id = -1, |
|||
| input int | stream_id = -1 | |||
| ) |
Definition at line 513 of file vmm_mam.sv.
| void vmm_mam_region::poke | ( | output vmm_rw::status_e | status, | |
| input bit< VMM_RAL_ADDR_WIDTH-1:0 > | offset, | |||
| input bit< VMM_RAL_DATA_WIDTH-1:0 > | value, | |||
| input int | data_id = -1, |
|||
| input int | scenario_id = -1, |
|||
| input int | stream_id = -1 | |||
| ) |
Definition at line 550 of file vmm_mam.sv.
| void vmm_mam_region::peek | ( | output vmm_rw::status_e | status, | |
| input bit< VMM_RAL_ADDR_WIDTH-1:0 > | offset, | |||
| output bit< VMM_RAL_DATA_WIDTH-1:0 > | value, | |||
| input int | data_id = -1, |
|||
| input int | scenario_id = -1, |
|||
| input int | stream_id = -1 | |||
| ) |
Definition at line 577 of file vmm_mam.sv.
| bit [63:0] vmm_mam_region::Xstart_offsetX |
Definition at line 35 of file vmm_mam.sv.
| bit [63:0] vmm_mam_region::Xend_offsetX |
Definition at line 36 of file vmm_mam.sv.
int unsigned vmm_mam_region::len [private] |
Definition at line 38 of file vmm_mam.sv.
int unsigned vmm_mam_region::n_bytes [private] |
Definition at line 39 of file vmm_mam.sv.
vmm_mam vmm_mam_region::parent [private] |
Definition at line 40 of file vmm_mam.sv.
Definition at line 42 of file vmm_mam.sv.
![]() Intelligent Design Verification Project: VMM, Revision: 1.0.1 |
Copyright (c) 2008 Intelligent Design Verification. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included here: http://www.intelligentdv.com/licenses/fdl.txt |
![]() Doxygen Version: 1.5.6 Sat Oct 18 11:32:26 2008 |