hw_reset.sv

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00001 // 
00002 // -------------------------------------------------------------
00003 //    Copyright 2004-2008 Synopsys, Inc.
00004 //    All Rights Reserved Worldwide
00005 // 
00006 //    Licensed under the Apache License, Version 2.0 (the
00007 //    "License"); you may not use this file except in
00008 //    compliance with the License.  You may obtain a copy of
00009 //    the License at
00010 // 
00011 //        http://www.apache.org/licenses/LICENSE-2.0
00012 // 
00013 //    Unless required by applicable law or agreed to in
00014 //    writing, software distributed under the License is
00015 //    distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
00016 //    CONDITIONS OF ANY KIND, either express or implied.  See
00017 //    the License for the specific language governing
00018 //    permissions and limitations under the License.
00019 // -------------------------------------------------------------
00020 // 
00021 
00022 
00023 `include "ral_env.svh"
00024 
00025 `ifndef RAL_TB_ENV
00026 `define RAL_TB_ENV tb_env
00027 `endif
00028 
00029 
00030 program hw_reset;
00031 
00032 vmm_log log = new("Reset Value", "Test");
00033 `RAL_TB_ENV env = new;
00034 
00035 initial
00036 begin
00037    vmm_ral_block_or_sys ral_model;
00038    vmm_ral_reg regs[];
00039 
00040    ral_model = env.ral.get_model();
00041    if (ral_model == null) begin
00042       `vmm_fatal(log, "No RAL abstraction model was specified");
00043    end
00044 
00045    env.reset_dut();
00046    ral_model.reset();
00047 
00048    // Iterate over all registers, checking the reset values
00049    ral_model.get_registers(regs);
00050    foreach (regs[i]) begin
00051       string domains[];
00052 
00053       // Registers may be accessible from multiple physical interfaces (domains)
00054       regs[i].get_domains(domains);
00055 
00056       // Verify the initial (reset) value in each domain
00057       foreach (domains[j]) begin
00058          vmm_rw::status_e status;
00059          bit [`VMM_RAL_DATA_WIDTH-1:0] v;
00060       
00061          `vmm_note(log, $psprintf("Verifying reset value of register %s in domain \"%s\"...",
00062                                   regs[i].get_fullname(), domains[j]));
00063 
00064          regs[i].mirror(status, vmm_ral::VERB, vmm_ral::BFM, domains[j]);
00065          if (status != vmm_rw::IS_OK) begin
00066             `vmm_error(log, $psprintf("Status was %s when reading reset value of register \"%s\" through domain \"%s\".",
00067                                       status.name(), regs[i].get_fullname(), domains[j]));
00068          end
00069       end
00070    end
00071    
00072    env.log.report();
00073 end
00074 endprogram: hw_reset
00075 

Intelligent Design Verification
Intelligent Design Verification
Project: VMM, Revision: 1.0.0
Copyright (c) 2008 Intelligent Design Verification.
Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts.
A copy of the license is included here:
http://www.intelligentdv.com/licenses/fdl.txt
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