Doxygen Filter for System Verilog 1.5.4 Released
I’ve posted a minor update from the previous release that includes:
- improved processing of program, module, and interface blocks (thanks to Francois-Xavier Desmarais)
- another macro HACK - to fix an issue in the processing of the VMM; the hack converts a macro instantiated channel into a templatized instance
You can grab the new version from the download page or directly from SVN.
Details about how to install and use filter, along with examples, can be found in the original filter release post.
Download!