VCS Release C-2009.06 runs OVM
It looks like Synopsys has (quietly) released a version of VCS (C-2009-06) that supports OVM.
This is great news for the verification engineer! This means that:
- VCS users can finally take a look at OVM in earnest and make a ‘hands on’ comparison (beyond the marketing slides).
- OVM users that are ’stuck’ with ‘only’ 2 EDA vendors now have a 3rd option for a simulator
- AND – it means that there’s potential for the big 3 EDA vendors to unite on a single verification methodology.
To run an example simply replace the run_questa script with a run_vcs script that looks like this:
vcs -sverilog -R -f compile_questa_sv.f
Easy! (With one minor caviat – some of the compile_quest_sv.f files include Questa specific options that you’ll need to remove.)
For the (few) examples that I’ve tried vcs has output the result that I would have expected.
If you find an example that doesn’t work I’d bet that both Synopsys and the OVM World folks would be interested in hearing about it.
Oh – and an aside – no funny business (ahem! `ifdef INCA ahem!) was required to run the examples. So VCS appears to have taken a big leap forward in its implementation of the SV standard. Good job Synopsys!
-VCyeS
June 16th, 2009 at 10:00 am
Hi Sean,
Indeed, this is good news! For nearly two years we have talked to many VCS users who wanted to access the reuse and scalability only found in the OVM. The limitation seemed to be that VCS had not implemented enough of SystemVerilog to run the OVM, but we couldn’t tell for sure. It looks like your test has shown that VCS language support has caught up to Incisive.
You are also correct in that Cadence and Mentor have worked hard, with the help of the nearly 8000 users on the OVMWorld, to assure one library can run unmodified on both simulators. If your readers do find issues, please have them post to http://www.ovmworld.org/forums/ .
Regards,
Adam Sherilog, Cadence
June 18th, 2009 at 3:04 pm
Hi Sean,
Interesting news. A few questions:
- Have other people besides you successfully run OVM on VCS?
- How complex were the tests you ran? Did they cover a lot of the OVM library and System-Verilog language?
- Any speed comparisons (assuming you ran the same thing on IUS and/or Questa)?
Harry
June 21st, 2009 at 11:34 am
@Adam Sherilog
Hi Adam –
Thanks for the response.
I appreciate your enthusiasm for OVM. The more that I look at it – the more I like it.
A comment:
I don’t think that your assessment of VCS is very fair. While it is true that VCS, to date, hadn’t had enough of the SV standard implemented to support OVM, the only reason that Incisive supports OVM is because Cadence had a hand in its implementation. If it weren’t for the `ifdef INCA(s) found throughout OVM then incisive wouldn’t be able to claim OVM support…
OVM Users – type this:
cd ${OVM_HOME}/srcWow! There are clearly two OVMs lurking in the OVM Library. One clean SV implementation – and one for Incisive support.
I’d say that VCS has done more than ‘caught up’ with Incisive. I’d say that, based on my limited testing (and grep’ing), VCS has leapfrogged Incisive and is at parity with Questa as far as SV language support is concerned..
(Example – support for map of maps; support for process)
I’m pretty impressed that VCS runs the OVM examples now – especially since Synopsys didn’t have the benefit of being able to affect the implementation of OVM.
And so I’ll repeat: Good Job Synopsys!
-Sean, IDV
June 21st, 2009 at 11:49 am
@Harry Gries
Hi Harry,
Thanks for your comment.
Responding to your questions:
- Have other people besides you successfully run OVM on VCS?
I have no idea – and how could I know? Understand – I simply discovered that I could run the examples provided with the OVM with the new release of VCS (C-2009.06).
So, dear readers, have you tried any OVM with VCS? Harry wants a head count.
- How complex were the tests you ran? Did they cover a lot of the OVM library and System-Verilog language?
Again – the tests were nothing more than my running a handful of the examples provided with the OVM library. I can see that the library compiles and the examples run with the correct output. I didn’t have to add any `ifdef VCS frames with alternate implementations. Take a look at the OVM examples provided – let me know if you find one (or two) of particular interest and I can run it.
- Any speed comparisons (assuming you ran the same thing on IUS and/or Questa)?
No. I only have a license for VCSi. VCSi is the non-optimized version of VCS – and is therefore expected to be slower than VCS. I don’t have Questa or Incisive licenses. I’d love it if you sanctioned a simulator race on your blog! You’d have to provide a DUT and testbench. And a set of simulator option ground rules to establish 3 races: regression mode (any optimization switches allowed), DUT debug mode (log output, waveform dumping required), DV debug mode (log output, dumping, code stepping, transaction debug). And then you’d also have to provide the machine to run it on… A test like this would sure clear up the best way to run each of the simulators.
-Sean, IDV